Military Communications

This circuit is a frequency selective, radio frequency (RF) detector that offers 90 dB of detection range from 35 MHz to 4.4 GHz. Unlike a standalone detector that does not discriminate between signals in the frequency spectrum, this circuit has the ability to focus on a narrow band of frequencies, providing enhanced performance over the specified range. The detector circuit is rms responding and stable vs. temperature and frequency, making it an attractive solution for applications that require precise frequency, selective RF power measurement. The circuit also demonstrates strong immunity to unwanted blockers. Figure 1 shows a simplified schematic of the circuit.

The circuit shown in Figure 1 is a 16-bit, 250 MSPS, narrow-band, high IF receiver front end with an optimum interface between the ADL5565 differential amplifier and the AD9467 ADC.

The AD9467 is a buffered input 16-bit, 200 MSPS or 250 MSPS ADC with SNR performance of approximately 75.5 dBFS and SFDR performance between 95 dBFS and 98 dBFS. The ADL5565 differential amplifier is suitable for driving IF sampling ADCs because of its high input bandwidth, low distortion, and high output linearity.

This circuit note describes a systematic procedure for designing the interface circuit and the antialiasing filter that maintains high performance and ensures minimal signal loss. A resonant approach is used to design a maximally flat Butterworth fourth-order band-pass filter with a center frequency of 200 MHz.

Many systems require low jitter multiple system clocks for mixed signal processing and timing. The circuit shown in Figure 1 interfaces the ADF4351 integrated phase-locked loop (PLL) and voltage-controlled oscillator (VCO) to the ADCLK948, which provides up to eight differential, low voltage, positive emitter coupled logic (LVPECL) outputs from one differential output of the ADF4351.

 

Modern digital systems often require many high quality clocks at logic levels that are different from the logic level of the clock source. Extra buffering may be required to guarantee accurate distribution to other circuit components without loss of integrity. The interface between the ADF4351 clock source ADCLK948 clock fanout buffer is described, and measurements show that the additive jitter associated with the clock fanout buffer is 75 fs rms.

The circuit shown in Figure 1 solves a problem often encountered in dc-coupled single-supply systems when interfacing bipolar input signals to differential input, low voltage analog-to-digital converters (ADCs). The technique ensures the proper common-mode voltage level at the input to the differential drive amplifier by controlling the input common-mode level using two level shifting resistors. The output common-mode voltage is established independently by applying the correct voltage to the VOCM pin of the ADA4930-1 differential driver.

This flexible arrangement allows the ADA4930-1 differential driver to operate on a single 3.3 V supply, while the AD9265 16-bit 125 MSPS ADC operates on a 1.8 V supply, thereby minimizing the total circuit power dissipation.

In broadband applications, the frequency range of interest often includes dc. To maximize the dynamic range of a differential input ADC, typical input signals can be relatively large, thereby requiring the differential driver to operate at lower gain settings. Under these conditions, the input common-mode voltage of the differential driver must stay within the specified range.

Independent control of the input and output common-mode voltage of differential amplifiers is often required in direct coupled single-supply applications such as processing demodulator outputs with high input common-mode voltages, x-ray applications with a dc component added to a differential component, and other places where the differential driver must handle low value input common-mode voltages. Low input common-mode voltage applications can include either single-ended or differential inputs, with zero, bipolar, or negative inputs.

This circuit is a complete implementation of the analog portion of a broadband direct conversion transmitter (analog baseband in, RF out). RF frequencies from 500 MHz to 4.4 GHz are supported using a phase-locked loop (PLL) with a broadband, integrated voltage controlled oscillator (VCO). Harmonic filtering of the local oscillator (LO) from the PLL ensures excellent quadrature accuracy, sideband suppression, and low EVM.

 

 

Low noise, low dropout regulators (LDOs) ensure that the power management scheme has no adverse impact on phase noise and EVM. This combination of components represents industry leading direct conversion transmitter performance over a frequency range of 500 MHz to 4.4 GHz.

The circuit shown in Figure 1 is an RF power measurement circuit that accurately measures the power from an RF signal source within a frequency range of 9 kHz to 6 GHz, and has a nominal input power range of 45 dBm (−30 dBm to +15 dBm).

This circuit constitutes a complete rms RF power meter in a tiny form factor that can be powered entirely from a 5 V USB power supply. The measurement signal chain consists of an rms responding RF power detector and a 12-bit, precision analog-to-digital converter (ADC). These devices are powered by a CMOS linear regulator which generates 3.3 V from the 5 V USB supply.

A simple calibration routine can be performed at multiple frequencies to compensate for any frequency response variation of the circuit. Calibration data is stored in a lookup table, which is referenced during the RF power measurement.

The circuit shown in Figure 1 is a broadband low distortion RF transmitter with a dual high speed TxDAC+ digital-to-analog converter (DAC), a wideband I/Q modulator, and an output driver amplifier.

The devices are well matched, and the direct interface between the DAC and the modulator, and between the modulator and the driver amplifier, offers a compact solution for many RF communications applications including 3G, 4G, and LTE.

The automatic gain control (AGC) circuit is useful in multiple applications such as amplitude stabilization of a synthesizer, controlling output power in a transmitter, or optimizing dynamic range in a receiver. The circuit shown in Figure 1 uses the ADL6010 detector, along with the HMC985A voltage variable attenuator (VVA) and the HMC635 RF amplifier, to provide automatic gain control over a wide range of input frequencies (20 GHz to 37.5 GHz) and amplitude. Circuit performance, as measured by the AGC figures of merit described in this circuit note, are very good between 20 GHz and 30 GHz. The overall gain of the circuit falls off above 30 GHz. However, improvements can be made over narrow bands by using matching techniques not explored in this circuit note.

The AGC circuit has applications in microwave instrumentation and radar-based measurement systems.

 

 

The circuit in Figure 1 is a true rms responding power detector using a variable gain amplifier (VGA) and an rms-responding power detector to provide an extremely wide detection range of approximately 95 dB. RMS detectors are useful in many applications such as receivers and transmitters where accurate measurement of signal power is required. Because the circuit measures rms power, it is suitable for use in systems with diverse or varying crest factors. Examples of such systems include GSM/EDGE, CDMA, WCDMA, TD-SCDMA and LTE based wireless base stations along with any system that uses QAM modulation.

The detection range of the ADL5902 rms detector is 65 dB and is extended to 95 dB by the addition of the linear-in-dB AD8368 VGA. The ADL5902 TADJ function is used to provide temperature stability for the complete circuit. A SAW filter is placed between the VGA to reduce noise and increase sensitivity. This also reduces the frequency range of the circuit to the pass-band range of the SAW filter.

The PLL circuit shown in Figure 1 uses a 13 GHz Fractional-N synthesizer, wideband active loop filter and VCO, and has a phase settling time of less than 5 μs to within 5° for a 200 MHz frequency jump.

The performance is achieved using an active loop filter with 2.4 MHz bandwidth. This wide bandwidth loop filter is achievable because of the ADF4159 phase-frequency detector (PFD) maximum frequency of 110 MHz; and the AD8065 op amp high gain-bandwidth product of 145 MHz.

The AD8065 op amp used in the active filter can operate on a 24 V supply voltage that allows control of most wideband VCOs having tuning voltages from 0 V to 18 V.

This circuit is a complete implementation of the analog portion of a broadband direct conversion transmitter (analog baseband in, RF out). RF frequencies from 30 MHz to 2.2 GHz are supported by using a phase-locked loop (PLL) with a broadband integrated voltage controlled oscillator (VCO). Unlike modulators that use a divide-by-1 local oscillator (LO) stage (as described in CN-0285), harmonic filtering of the LO is not required.

To achieve optimum performance, the only requirement is that the LO inputs of the modulator be driven differentially. The ADF4351 provides differential RF outputs and is, therefore, an excellent match. This PLL-to-modulator interface is applicable to all I/Q modulators and I/Q demodulators that contain a 2XLO-based phase splitter. Low noise LDOs ensure that the power management scheme has no adverse impact on phase noise and error vector magnitude (EVM). This combination of components represents an industry-leading direct conversion transmitter performance over a frequency range of 30 MHz to 2.2 GHz. For frequencies above 2.2 GHz, it is recommended to use a divide-by-1 modulator, as described in CN-0285.

The circuit shown in Figure 1 is a 10 MHz to 6 GHz wideband active mixer with a direct interface to a frequency synthesizer-based low phase noise local oscillator (LO).

This circuit offers an optimum solution that is attractive in wideband applications that require frequency conversion to higher or lower frequencies. The two-chip circuit covers a broad LO frequency range from 35 MHz to 4400 MHz. The LO interface is simple and glueless, eliminating the need for a balun, matching network, and LO buffer. In addition, the mixer bias adjust function allows optimization of IP3, noise figure, and supply current based on the application requirements or on the size of the input signal.

This board is no longer available for ordering.

The AD-FMCOMMS1-EBZ high-speed analog module is designed to showcase the latest generation high-speed data converters. The AD-FMCOMMS1-EBZ provides the analog front-end for a wide range of compute-intensive FPGA-based radio applications.

The AD-FMCOMMS1-EBZ is an analog front end hardware platform that addresses a broad range of research, academic, industrial and defense applications. The AD-FMCOMMS1-EBZ enables RF applications from 400MHz to 4 GHz. The module is customizable to a wide range of frequencies by software without any hardware changes, providing options for GPS or IEEE 1588 Synchronization, and MIMO configurations.

When combined with the Xilinx ZYNQ^® Software-Defined Radio Kit, AD-FMCOMMS1-EBZ enables a variety of wireless communications functions at the physical layer, from baseband to RF. With up to 4 GB of flash storage space, 512 MB of RAM, Gigabit Ethernet interface (depending on the base platform) and a Linux image built specifically for the AD-FMCOMMS1-EBZ, you can get everything you need for a easy out of the box experience. The platform offers enough flexibility for many applications, and supports streaming data, and standard web interfaces to analyze transmitted RF data.

Applications

• Electronic test and measurement equipment
• General-purpose software radios
• Radar systems
• Ultra wideband satellite receivers
• Point to point communication systems

The AD-FMCOMMS2-EBZ is a high-speed analog module designed to showcase the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. Its programmability and wideband capability make it ideal for a broad range of transceiver applications. The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor or FPGA. The AD9361 chip operates in the 70 MHz to 6 GHz range, covering most licensed and unlicensed bands. The AD-FMCOMMS2-EBZ board comes specifically tuned and optimized to 2.4 GHz and due to the limitations of the on-board discrete external components, it may exhibit diminished RF performance on some other programmed configurations. The chip supports channel bandwidths from less than 200 kHz to 56 MHz by changing sample rate, digital filters, and decimation, all programmable within the AD9361 itself.

The AD-FMCOMMS2-EBZ provides RF engineers the ability to connect the AD9361 to a RF testbench (Vector Signal Analyzer, Signal generator, etc) and measure performance. The external components (which can easily be swapped) on the AD-FMCOMMS2-EBZ have a narrower RF tuning range 2400 – 2500 MHz. It is expected that most engineers will change these external components (pin for pin replacements from various vendors are available) for their specific application/frequency of interest. Anyone interested in a wider tuning range board should look at the AD-FMCOMMS3-EBZ.

The AD-FMCOMMS3-EBZ is a high-speed analog module designed to showcase the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. Its programmability and wideband capability make it ideal for a broad range of transceiver applications. The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor or FPGA. The AD9361 chip operates in the 70 MHz to 6 GHz range, covering most licensed and unlicensed bands. The chip supports channel bandwidths from less than 200 kHz to 56 MHz by changing sample rate, digital filters, and decimation, which are all programmable within the AD9361 itself.

The AD-FMCOMMS3-EBZ provides software developers and system architect who want a single platform to operate over a wider tuning range than the AD-FMCOMMS2-EBZ. RF performance expectations of this board must be tempered with the very wide band front end. It does meet the datasheet specifications at 2.4 GHz, but does not over the entire RF tuning range that the board supports. Typical performance data for the entire range (70 MHz – 6 GHz) which is supported by the platform is published within the board documentation. This board is primarily intended for system investigation and bringing up various waveforms from a software team before custom hardware is complete. The objective being for designers to see waveforms, but not being concerned about the last 1dB or 1% EVM of performance. For performance-oriented platforms – please refer to the AD-FMCOMMS2-EBZ.

The AD-FMCOMMS4-EBZ provides software developers and system architect with a single 1 x 1 transceiver platform that can be software-configured for wideband tuning as well as narrowband RF performance.

In the wideband configuration, the AD-FMCOMMS4-EBZ will operate over the full 70 MHz to 6 GHz tuning range of the AD9364, however, the RF performance expectations of this configuration must be tempered with the very wide band front end. It will meet the AD9364 datasheet specifications at 2.4 GHz, but does not over the entire RF tuning range that the board can support. Typical performance data for the platform’s entire tuning range is published within the board documentation. This configuration is primarily intended for system investigation and bringing up various waveforms from a software team before custom hardware is complete. The objective being for designers to see waveforms, but not being concerned about the last 1dB or 1% EVM of performance.

The AD-FMCOMMS4-EBZ can also be user-configured for optimum performance in the 2400 – 2500 MHz band. In this configuration it may exhibit diminished RF performance on tuned frequencies or programmed configurations, outside of this band. This configuration is primarily intended to provide RF engineers with the ability to connect the AD9364 to an RF test bench (Vector Signal Analyzer, Signal generator, etc.) and achieve its optimum performance. The AD-FMCOMMS4-EBZ is a high-speed 1 x 1 agile RF transceiver analog FMC module software-tunable over the 56 MHz to 6 GHz band.

The AD-FMCOMMS5-EBZ is a high-speed analog module designed to showcase the AD9361 in multiple-input, multiple-output (MIMO) applications. The AD9361 is a high performance, highly integrated RF transceiver that operates from 70 MHz to 6 GHz, and supports bandwidths from less than 200 kHz to 56 MHz. The AD-FMCOMMS5-EBZ supports dual AD9361 devices, allowing for the creation of a 4x4 MIMO system. This platform is intended to enable the prototyping and development of many software defined radio applications, such as active antennas, transmit beamforming, and receive angle of arrival systems. The AD-FMCOMMS5-EBZ board has both wideband channels covering the full 6 GHz range, as well as narrowband channels matched to 2.4GHz. The AD-FMCOMMS5-EBZ also contains dual ADG918 SPDT switches, which create a calibration matrix between the two AD9361s. This switch matrix hardware, combined with the Analog Devices supplied API software, allow for a full digital and RF synchronization between the two AD9361s. The providing APIs also support full independent device configuration of the two AD9361s.

Because the AD-FMCOMMS5-EBZ supports both narrow and wideband input and output connectivity, it provides RF engineers the ability to connect the AD9361 to a RF test bench (vector signal analyzer, signal generator, etc.) and measure narrowband performance, as well as providing software and system engineers the ability to quickly prototype across the full 6 GHz operating range. Additionally the AD-FMCOMMS5-EBZ allows for both AD9361 devices to receive an on-board generated external LO signal, which can provide improved RF performance.

Applications

• General purpose design suitable for any software-designed radio application
• MIMO radio
• Transmit beamforming and receive angle of arrival detection
• Point to point communication systems
• Femtocell/picocell/microcell base stations