Phase Locked Loop (PLL) Synthesizer & Translation Loop
ADI’s industry leading phase locked loop (PLL) synthesizer family features a wide variety of high performance, low jitter clock generation and distribution devices. The extensive, ever growing phase locked loop family now includes over 100 products, optimized for high data rate, low jitter clocking applications. The portfolio features PLLs, PLL/VCOs, and distribution chips, designed for clocking applications which require synchronization, clock distribution, and phase noise performance.
Analog Devices has over 25 years of experience in design and test of industry leading phase locked loop integrated circuit products. With the industry's widest portfolio of PLL products, we can cover virtually all your PLL needs.
Analog Devices’ fully integrated and ready to use translation loop (also known as an offset loop) System in Package (SiP) are used for frequency synthesis in highly jitter sensitive applications, and reduce board space and complexity compared to traditional discrete translation loop solutions designed on a PCB. Time to market is significantly reduced by taking advantage of this highly integrated solution with in-package circuitry and enhanced isolation that attenuate spurious components. Analog Devices’ translation loop solutions provide a frequency synthesis solution for engineers designing highly competitive systems.
Analog Devices has over 25 years of experience in design and test of industry leading phase locked loop integrated circuit products. With the industry's widest portfolio of PLL products, we can cover virtually all your PLL needs.
Analog Devices’ fully integrated and ready to use translation loop (also known as an offset loop) System in Package (SiP) are used for frequency synthesis in highly jitter sensitive applications, and reduce board space and complexity compared to traditional discrete translation loop solutions designed on a PCB. Time to market is significantly reduced by taking advantage of this highly integrated solution with in-package circuitry and enhanced isolation that attenuate spurious components. Analog Devices’ translation loop solutions provide a frequency synthesis solution for engineers designing highly competitive systems.
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Product Selection Table
ADIsimPLL™ Analog Design Tool
ADIsimPLL is a phase-locked loop (PLL) circuit-design and evaluation tool that assists users in evaluating, designing, and troubleshooting RF systems. The tool uses Analog Devices' family of PLL synthesizers.
Latest Resources
Application Notes
Press Releases
- Wideband Microwave Synthesizer Delivers Industry Leading Phase Noise, Output Power and Spur Performance with Operation from 55 MHz to 15 GHz
- Analog Devices’ Wideband RF Synthesizers Feature System Size Reduction, Design Versatility, and Excellent Performance to 13.6 GHz
- Analog Devices’ 4-GHz PLL Synthesizer Offers Leading Phase Noise Performance
- Analog Devices Debuts Industry’s Highest Performing 13 GHz PLL Synthesizer
- Analog Devices Conducts Upcoming Webcasts on RF Design
Design Notes
Technical Articles
- Integrated Hardened DSP on DAC/ADC ICs Improves Wideband Multichannel Systems
- Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs
- Driving the VCO of a High Voltage Phase-Locked Loop Frequency Synthesizer Circuit
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Phase-Locked Loop (PLL) Fundamentals
Analog Dialogue
- Phase Alignment and Control on the ADF4356/ADF5356 Devices
Circuit Note
- CN0228: Single Supply Powers a 28 V, High Voltage Phase-Locked Loop (PLL) Synthesizer PDF
- CN0320: An IQ Demodulator-Based IF-to-Baseband Receiver with IF and Baseband Variable Gain and Programmable Baseband Filtering PDF
- CN-0239: Broadband 6 GHz Active Mixer with a Glueless Local Oscillator Interface (Rev. A) PDF
- CN-0285: Broadband Low Error Vector Magnitude (EVM) Direct Conversion Transmitter PDF
- CN0294: Increasing the Number of Outputs from a Clock Source Using Low Jitter LVPECL Fanout Buffers PDF
Technical Books
Design Tools
Solutions Bulletins & Brochures
Webcasts
- Multi-Channel System Improvements Using Hardened DSP in Digitizer ICs
- Latest Developments in Analog Devices PLL Portfolio
- Explaining Phase Noise
- Fundamentals of Frequency Synthesis, Part 1: Phased Locked Loops
- Fundamentals of Clocks
Videos
- 16 Channel Tx/Rx S-Band Phased Array RADAR Platform
- Perfection of Translation Loop: Eliminating Spurious Signals
- 16Tx/16Rx L/S-Band Phased Array Radar & EW Prototyping Platform
- ADF4401A: 10fs Jitter, DC to 8GHz Translation Loop
- Instrument-Grade mmWave Transmit Signal Chain